> But why on line 3 is the opcode '31' present when an xor on two 32-bit registers should generate an opcode of '33' ?
Why? For registers, the encodings are functionally equivalent:
31/r XOR r/m32,r32
33/r XOR r32,r/m32
i.e., both can encode XOR r32,r32
> The opcode for a 32-bit reg-reg mov instruction should generate '8B' and not '89'.
Why? For registers, the encodings are functionally equivalent:
89/r MOV r/m32,r32
8B/r MOV r32,r/m32
i.e., both can encode MOV r32,r32
Some instructions have a one byte size reduction if you preference the accumulator. I've seen some people complain that NASM doesn't assemble the same byte sequences as other assemblers. Supposedly, someone produced a MASM compatible version. Does anyone know if there any reason, besides compatibility, to prefer '31' over '33', etc?
Rod Pemberton