Author Topic: This is a strange representation of a global descriptor table.  (Read 150 times)

Offline ben321

  • Full Member
  • **
  • Posts: 133
This is a strange representation of a global descriptor table.
« on: October 09, 2022, 09:26:26 AM »
If you look at this https://upload.wikimedia.org/wikipedia/commons/thumb/0/0a/SegmentDescriptor.svg/2560px-SegmentDescriptor.svg.png it shows that the field is the first 16 bits of Segment Limit is the last field in the descriptor. In actuality it's the FIRST field in the descriptor. What is going on with this diagram? I've seen a couple different diagrams, and none of them seem to show it actually correctly. Fortunately the same page that had that diagram also had this sample code that should compile and work properly in NASM.
Code: [Select]
gdt:

; offset 0x0 (0 bytes)
.null_descriptor:
dq 0x0

; offset 0x8 (8 bytes)
.code_descriptor: ; cs should point to this descriptor
dw 0xffff ; segment limit first 0-15 bits
dw 0x0 ; base first 0-15 bits
db 0x0 ; base 16-23 bits
db 0x9a ; access byte
db 0b11001111 ; high 4 bits (flags) low 4 bits (limit 4 last bits)(limit is 20 bit wide)
db 0x0 ; base 24-31 bits

; offset 0x10 (16 bytes)
.data_descriptor: ; ds, es, fs, gs, and ss should point to this descriptor
dw 0xffff ; segment limit first 0-15 bits
dw 0x0 ; base first 0-15 bits
db 0x0 ; base 16-23 bits
db 0x92 ; access byte
db 0b11001111 ; high 4 bits (flags) low 4 bits (limit 4 last bits)(limit is 20 bit wide)
db 0x0 ; base 24-31 bits

Can anybody here explain why the diagram is different from the way it's actually arranged in memory? Is it just that it's arranged by some strange convention for documenting the GDT? Or is this an actual error in the diagram?

Offline debs3759

  • Global Moderator
  • Full Member
  • *****
  • Posts: 183
  • Country: gb
    • GPUZoo
Re: This is a strange representation of a global descriptor table.
« Reply #1 on: October 09, 2022, 09:38:59 AM »
It's to do with endianism. Intel processors use Little Endian addressing, so the least significant byte is stored at the highest address. So the diagram is right, just not necessarily logical.
My graphics card database: www.gpuzoo.com

Offline ben321

  • Full Member
  • **
  • Posts: 133
Re: This is a strange representation of a global descriptor table.
« Reply #2 on: October 09, 2022, 12:07:12 PM »
It's to do with endianism. Intel processors use Little Endian addressing, so the least significant byte is stored at the highest address. So the diagram is right, just not necessarily logical.

Except for the fact that the GDT isn't a multi-byte integer. Instead, it's a set of bit-fields, Which always goes from left to right.