Author Topic: Instructions from ref.x86asm.net  (Read 10236 times)

Offline Borneq

  • Jr. Member
  • *
  • Posts: 26
Instructions from ref.x86asm.net
« on: August 17, 2010, 09:35:57 AM »
I found http://ref.x86asm.net/x86reference.xml. I want to write simple disassembler based on it. What doing when encounter byte 0x98? It is multiple mnemonic http://ref.x86asm.net/geek.html#x98. When to write CBW,CWDE or CDQE ? CWDE write when is set bit D in CS segment descriptor? When write  CDQE? What write when will prefix 0x66 or 0x67?

Offline Frank Kotler

  • NASM Developer
  • Hero Member
  • *****
  • Posts: 2667
  • Country: us
Re: Instructions from ref.x86asm.net
« Reply #1 on: August 17, 2010, 10:15:21 AM »
0x67 is the address size override prefix, and doesn't come into it. That part was easy. :)

Looking at ndisasm's output (which you could do yourself), I think...

With D-bit clear, 0x98 is cbw - with the 0x66 prefix, it's cwde.

With D-bit set, it's cwde, with 0x66 it's cbw.

With a 0x48 prefix, it's cdqe.

I wouldn't bet my pacemaker on that! :)

Best,
Frank


Offline Borneq

  • Jr. Member
  • *
  • Posts: 26
Re: Instructions from ref.x86asm.net
« Reply #2 on: August 17, 2010, 11:20:56 AM »
With D-bit clear, 0x98 is cbw - with the 0x66 prefix, it's cwde.
With D-bit set, it's cwde, with 0x66 it's cbw.
With a 0x48 prefix, it's cdqe.
It is possible 0x48 and 0x66 prefix at the same time?
64-bit instruction all must have 0x48 prefix or is possible 64-bit mode when instruction is all 64-bit except that have non 64 bit prefix?

Thanks

Offline Frank Kotler

  • NASM Developer
  • Hero Member
  • *****
  • Posts: 2667
  • Country: us
Re: Instructions from ref.x86asm.net
« Reply #3 on: August 17, 2010, 11:37:15 AM »
Quote
It is possible 0x48 and 0x66 prefix at the same time?

Dunno. Try it!

I don't know much about 64-bits, Borneq. I was just going by what Ndisasm said...

Best,
Frank