Author Topic: NASM Documentation Contradicts AMD64 ABI re 16-byte Stack Frame Alignment?  (Read 8028 times)

Offline belltown

  • Jr. Member
  • *
  • Posts: 2
I'm trying to understand the concept of stack frame alignment as required by the AMD64 ABI.

In the NASM documentation, Chapter 12 - Writing 64-bit Code (Unix, Win64): "All known 64-bit platforms except some embedded platforms require that the stack is 16-byte aligned at the entry to a function. In order to enforce that, the stack pointer (RSP) needs to be aligned on an odd multiple of 8 bytes before the CALL instruction."

That seems to be the opposite of what is stated in the System V Application Binary Interface AMD64 Architecture Processor Supplement:

3.2.2 The Stack Frame: "The end of the input argument area shall be aligned on a 16 byte boundary. In other words, the stack needs to be 16 byte aligned immediately before the call instruction is executed. Once control has been transferred to the function entry point, i.e. immediately after the return address has been pushed, %rsp points to the return address, and the value of (%rsp + 8 ) is a multiple of 16."

So it appears to me that the NASM documentation says that the stack should be 16-byte aligned at function entry (AFTER the call has been executed), whereas the ABI states that the stack pointer should be 16-byte aligned BEFORE the function call.

Equivalently, the NASM says that BEFORE the function call, the stack pointer is an odd multiple of 8 bytes, whereas the ABI states that AFTER the function call, the stack pointer is odd multiple of 8 bytes.

Can someone please clear up this contradiction?

Offline vitsoft

  • Jr. Member
  • *
  • Posts: 13
  • Country: cz
    • About me
I believe it is a bug in NASM documentation, see also this topic.

Offline belltown

  • Jr. Member
  • *
  • Posts: 2
That's what I suspected. I just wanted to confirm that I wasn't misunderstanding how stack alignment is supposed to work.

Thanks