Author Topic: I think there's a missing opcode in NASM  (Read 8691 times)

Offline ben321

  • Full Member
  • **
  • Posts: 182
I think there's a missing opcode in NASM
« on: March 10, 2016, 07:41:11 AM »
The x86 opcodes CLZ (clear zero status flag) and CLV (clear overflow status flag) are not recognized by NASM. It thinks it is the name of a label that I'm trying to give to a line of code, and reminds me to put a colon after the label. The exact error is:
"warning: label alone on a line without a colon might be in error"

PLEASE fix this.
« Last Edit: March 10, 2016, 07:43:03 AM by ben321 »

Offline Bryant Keller

  • Forum Moderator
  • Full Member
  • *****
  • Posts: 360
  • Country: us
    • About Bryant Keller
Re: I think there's a missing opcode in NASM
« Reply #1 on: March 10, 2016, 11:32:18 AM »
I think you have your instruction sets mixed up. CLZ and CLV are AVR instructions, they are not valid Intel instructions.

Quote from: IA64-32 Instruction Set Reference
3.4.3.1 Status flags

The status flags (bits 0, 2, 4, 6, 7, and 11) of the EFLAGS register indicate the results of arithmetic instructions, such as the ADD, SUB, MUL, and DIV instructions. The status flag functions are:

CF (bit 0)Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic.
PF (bit 2)Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise.
AF (bit 4)Axillary Carry flag - Set if an arithmetic operation generates a carry or borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic.
ZF (bit 6)Zero flag - Set if the result is zero; cleared otherwise.
SF (bit 7)Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.)
OF (bit 11)            Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two's complement) arithmetic.

Of these status flags, only the CF flag can be modified directly, using the STC, CLC, CMC instructions. Also bit instructions (BT, BTS, BTR, and BTC) copy a specified bit into the CF flag.
« Last Edit: March 10, 2016, 11:36:28 AM by Bryant Keller »

About Bryant Keller
bkeller@about.me

Offline ben321

  • Full Member
  • **
  • Posts: 182
Re: I think there's a missing opcode in NASM
« Reply #2 on: January 06, 2017, 09:16:31 PM »
I think you have your instruction sets mixed up. CLZ and CLV are AVR instructions, they are not valid Intel instructions.

Quote from: IA64-32 Instruction Set Reference
3.4.3.1 Status flags

The status flags (bits 0, 2, 4, 6, 7, and 11) of the EFLAGS register indicate the results of arithmetic instructions, such as the ADD, SUB, MUL, and DIV instructions. The status flag functions are:

CF (bit 0)Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic.
PF (bit 2)Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise.
AF (bit 4)Axillary Carry flag - Set if an arithmetic operation generates a carry or borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic.
ZF (bit 6)Zero flag - Set if the result is zero; cleared otherwise.
SF (bit 7)Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.)
OF (bit 11)            Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two's complement) arithmetic.

Of these status flags, only the CF flag can be modified directly, using the STC, CLC, CMC instructions. Also bit instructions (BT, BTS, BTR, and BTC) copy a specified bit into the CF flag.

What do you mean by an AVR instruction?

Offline Frank Kotler

  • NASM Developer
  • Hero Member
  • *****
  • Posts: 2667
  • Country: us
Re: I think there's a missing opcode in NASM
« Reply #3 on: January 06, 2017, 09:38:27 PM »
An instruction for an Atmel AVR chip. Not covered by Nasm. Seriously Ben, I think you should consider another assembler. Nasm does not seem to be suiting your needs.

Best,
Frank


Offline ben321

  • Full Member
  • **
  • Posts: 182
Re: I think there's a missing opcode in NASM
« Reply #4 on: January 11, 2017, 03:01:07 AM »
An instruction for an Atmel AVR chip. Not covered by Nasm. Seriously Ben, I think you should consider another assembler. Nasm does not seem to be suiting your needs.

Best,
Frank

Actually, I just assumed that things like CLZ would have existed in the Intel x86 instruction set. I never imagined that such a simple thing would not have been included by Intel in their chips.