mov QWORD[rbp],01122334455667788h ; ***ERROR***

[kanito73]

Hello

I am trying to move a 64-bit value to a based address qword[rbp] but nasm throws the following error:

hello.asm:30: warning: signed dword immediate exceeds bounds [-w+number-overflow]
hello.asm:30: warning: dword data exceeds bounds [-w+number-overflow]

How can I move a 64-bit value to an address, for example to QWORD[myVar] or QWORD[rbp] or QWORD[buffer+rbp] ?

If I specify a double word value (like 011223344h) it works, but if it is larger it throws the error even if I use QWORD[...]


Thanks for your help

[Frank Kotler]

Move it into a register first?

Code: [Select]

mov rax ,01122334455667788h
mov [rbp], rax

64 bit code... It's weird!

Best,
Frank

[dreamCoder]

64-bit mode doesn't allow 64-bit encoding of immediates, except for MOV-ing to a 64-bit register. Like Frank's suggestion, u need to move it to another register first. The other way is through sign-extension, although it does not apply in your specific case. But even with sign-extension, it still requires some tricks like below

xor rbx,080000000h ;no.
xor rbx,-080000000h ;ok.
xor rbx,07fffffffh ;the highest you can go without the above trick

This goes to all other instructions (AND, XOR, etc) operating in 64-bit mode.

[Frank Kotler]

Thanks dreamCoder1

Best,
Frank

[fredericopissarra]

64-bit mode doesn't allow 64-bit encoding of immediates, except for MOV-ing to a 64-bit register.

I don't think this is true... When compiling this simple code, in C, using GCC for x86-64:

Code: [Select]

uint64_t f( void ) { return 0x1122334455667788UL; }
We get:

Code: [Select]

$ objdump -dM intel test.o
test.o:     file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <f>:
   0: 48 b8 88 77 66 55 44 movabs rax,0x1122334455667788
   7: 33 22 11
   a: c3                    ret
Sure, movabs is a GAS specific mnemomic. It is a MOV instruction (B8) with a REX prefix (48). And accepts all 64 bits immediate value!

Maybe this a NASM limitation? Note that nasm doc states on section 11.2:

The only instruction which takes a full 64-bit immediate is:

     MOV reg64,imm64

NASM will produce this instruction whenever the programmer uses MOV with an immediate into a 64-bit register...

[fredericopissarra]

Update: Using NASM 2.13.02 I've got no problems at all... the single mov r64,imm64 works fine!

[dreamCoder]

Update: Using NASM 2.13.02 I've got no problems at all... the single mov r64,imm64 works fine!

That's exactly what I meant by

64-bit mode doesn't allow 64-bit encoding of immediates, EXCEPT for MOV-ing to a 64-bit register.