Okay. So you'd need to switch back and forth "at will"?
I would prefer it to work on per-instruction basis. For example, now I can write
MOVDQA xmm0, [esi]
or
MOVDQA xmm0, [byte esi + 0]
or
MOVDQA xmm0, [dword esi + 0]
to switch between no offset, byte offset, and dword offset. It would be good if I could also specify something like
MOVDQA xmm0, [sib esi]
to force NASM to use SIB.
Similarly, I can write
DS ADD eax, 10
to add a DS segment prefix to this instruction. I want to also have an option to write e.g.
MODRM ADD eax, 10
to encode ADD eax, 10 using ModR/M scheme.
Do you have reason to think that longer instructions would be "better" than a few "nop"s? (I don't know)
For high-performance code modern processors often require certain alignment of instructions, e.g. for Intel Atom pairs of instructions should be aligned on 8-byte boundary, and for Intel Nehalem they should be aligned on 16 bytes. However, adding NOPs decreases the efficiency of instruction decoder (which is exactly what I want to improve with this optimization), and the same problem arises when using prefixes for aligning instructions. So changing instruction forms is the best option.