NASM - The Netwide Assembler
NASM Forum => Using NASM => Topic started by: RomekAtomek on June 13, 2022, 03:16:38 PM
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Hi all,
How to use AESDEC? I am getting an error for the code below. For IA64 it works but I have no IA64 processor.
BITS 64
CPU x64
1017 AESDEC XMM1, XMM2
1018 ****************** error: no instruction for this cpu level
Romek
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nasm doc section 7.11
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It was introduced with the Westmere architecture. If none of your hardware is x64 capable, it won't be supported.
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It was introduced with the Westmere architecture. If none of your hardware is x64 capable, it won't be supported.
The problem, above, is the CPU directive...
$ cat test.asm
bits 64
; cpu x64
aesdec xmm1,xmm2
$ nasm -v
NASM version 2.15.05 compiled on Oct 24 2020
$ nasm -l test.lst test.asm
$
1 bits 64
2 ;cpu x64
3
4 00000000 660F38DECA aesdec xmm1,xmm2
$ cat test2.asm
bits 64
cpu x64
aesdec xmm1,xmm2
$ nasm -l test2.lst test2.asm
test2.asm:4: error: no instruction for this cpu level
From the docs:
The CPU directive restricts assembly to those instructions which are available on the specified CPU
Without CPU there are no restrictions.
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My mistake was that I made the assumption that IA64 only applies to itanium.
I have another question. Is AESDEC instruction available in 16b mode? NASM accept it.
1020 CPU IA64
1021 BITS 16
1022 00000CEA C4E269DFCB VAESDECLAST XMM1, XMM2, XMM3
1023 00000CEF 660F38DECA AESDEC XMM1, XMM2
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Probably NOT... You don't need to use CPU directive, unless you want to LIMIT the instruction set.